Aller au menu Aller au contenu
Une voie, plusieurs choix
Informatique et Mathématiques appliquées
Une voie, plusieurs choix

> Formation > Cursus ingénieur

Architecture 1: Digital circuits and computer architecture elements - 3MMARCHI

A+Augmenter la taille du texteA-Réduire la taille du texteImprimer le documentEnvoyer cette page par mail Partagez cet article Facebook Twitter Linked In
  • Number of hours

    • Tutorials : 16.5
    • Laboratory works : 15.0
    ECTS : 4.0

Goals

This course aims at giving the bases required for the understanding of how a computer is able to performs program interpretation. In order to do so, it relies on the explanation of digital circuit behavior, that allows firstly the actual implementation of boolean logic and memory elements, and secondly defines the way to build complex functions using elementary functions. These concepts are developed in order to analyse and design simple processor behavior, and instruction set interpretation.
This course is by nature practical, and contains labs.

Contact Frédéric PETROT, Olivier MULLER

Content

The basic concepts of digital design are introduced through the presentation of logic gates, small elements capable of doing boolean opeations. Based on this, combinational and sequential circuits, elementary blocks necessary for all designs, are detailed. The notion of sequence is then introduced using the finite state machine concept, and the way to realize it in hardware, called synthesis, is detailed. The way to design complex circuits, including a finite state machine connected to functional units is also presented, paving the way for instruction interpretation and thus processor design.



Prerequisites

No prerequisit.

Tests

A 3 hours written exam at the end of the semester (all documents allowed), and a lab grade.



N1 = 2/3*E1+ 1/3*ExamTP
N2 = E2

Bibliography

David Patterson et John Hennessy, Computer Architecture, The hardware/software interface, 4ème édition, Morgan Kaufman
John F. Wakerly, Digital Design: Principles And Practices

A+Augmenter la taille du texteA-Réduire la taille du texteImprimer le documentEnvoyer cette page par mail Partagez cet article Facebook Twitter Linked In

Date of update January 15, 2017

Grenoble INP Institut d'ingénierie Univ. Grenoble Alpes