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Informatique et Mathématiques appliquées
Une voie, plusieurs choix

> Formation > Cursus ingénieur

Low-level software and hardware - 3MMCEP

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  • Number of hours

    • Lectures : 3.0
    • Laboratory works : 15.0
    • Projects : 15.0
    ECTS : 3.0

Goals

Filling the gap between high level programming and computer architecture, it provides students with a synthesis of these fields and a global understanding of how computers work. The course is organized around the learning of assembly languages (RISC and CISC).

The student will understand how a processor work, designing a RISC processor.

Contact Olivier MULLER

Content

  • Introduction. Processors. Computers. Programming model
  • Instructions coding
  • Symbolic representation
  • Assembler directives
  • Translation of control structures
  • Representation of data structures
  • Procedures and functions. Linking conventions and stack organization. Local variables.
  • Design of RISC processor (using Finite State Machine that controls a data path to complete)
  • Interrupts


Prerequisites

Knowledge of a classical imperative language (Ada, C...) and of the basis of computer architecture

Tests

NPR : Project evaluation (authorized only one manuscript A4 recto/verso)
NTP : Practical final examination
NTP2 : Practical final examination for session 2



N1 = (NPR+2*NTP)/3
N2 = NTP2

Bibliography

Le langage VHDL : du langage au circuit, du circuit au langage / Jacques Weber, Sébastien Moutault, Maurice Meaudre
SYSTEM V APPLICATION BINARY INTERFACE MIPS RISC Processor

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Date of update January 15, 2017

Grenoble INP Institut d'ingénierie Univ. Grenoble Alpes