Transaction level modeling of systems on chip - 5MMMTSP
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Number of hours
Lectures : 15.0
Laboratory works : 9.0
ECTS : 3.0
To cope with the complexity of the development of modern systems-on-chip, the industry utilizes abstractions such as transaction-level models. These models are generally written with the help of SystemC.
In this course, the students will learn the principles of transaction-level modeling in SystemC. The various abstraction levels at which a model may be written and the different ways to integrate embedded software in the models will also be discussed.
Contact Frédéric PETROT
Short introduction to C++
Presentation of SystemC
The TLM-2 library
Modeling issues, faithfulness of TLM models.
Integration of the embedded software in a TLM platform