Advanced computer architecture - 4MMARCA

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Number of hours
- Lectures : 16.5
- Tutorials : 16.5
ECTS : 2.5

Goals

This course aims at presenting the advanced hardware mechanisms that are used for optimized program execution in computers. These mechanisms allow to drastically increase processor and memory subsystem performance, and are also required to understand on chip or on board communication infrastructure. Other hardware mechanisms are necessary to understand more system related problems, such as parallel programming and virtual memory handling in operating systems.

Contact Frédéric PETROT

Content

Bus infrastructure : notion of master, slave, arbiter
RISC processor architecture study, based on the R3000
Caches, design and policies
Virtual memory support, TLB, MMU
Multiprocessor SMP/MP, hardware support for cache coherency and memory consistency, locks engines

Prerequisites

Digital circuits and computer architecture elements and Assembly language programming Modules

Tests

one written exam (3 h). If failed, a second 2h exam.

N1=E1
N2=E2

Additional Information

Course list

Curriculum->ENGINEERING systm of information->Semester 4

Curriculum->SLE.->Semester 4

Team->Architecture-System-Auto

Bibliography

David Patterson et John Hennessy, Computer Architecture, A Quantitative Approach, 4ème édition, Morgan Kaufman
William Stallings, Computer Organization and Architecture, 5ème édition, Prentice-Hall

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Version française

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École nationale supérieure d'informatique et de mathématiques appliquées
681, rue de la passerelle - Domaine universitaire - BP 72
38402 SAINT MARTIN D'HERES

Advanced computer architecture - 4MMARCA

Number of hours

Goals

Version française