Advanced computer architecture - 4MMARCA6

Informations générales

  • Number of hours

    • Lectures 16.5
    • Projects -
    • Tutorials 16.5
    • Internship -
    • Laboratory works -
    • Written tests -

    ECTS

    ECTS 3.0

Goal(s)

This course aims at presenting the advanced hardware mechanisms that are used for optimized program execution in computers. These mechanisms allow to drastically increase processor and memory subsystem performance, and are also required to understand on chip or on board communication infrastructure. Other hardware mechanisms are necessary to understand more system related problems, such as parallel programming and virtual memory handling in operating systems.

Responsible(s)

Frederic PETROT

Content(s)

  • Bus infrastructure : notion of master, slave, arbiter
  • RISC processor architecture study, based on the R3000
  • Caches, design and policies
  • Virtual memory support, TLB, MMU
  • Multiprocessor SMP/MP, hardware support for cache coherency and memory consistency, locks engines

Prerequisites

Digital circuits and computer architecture elements and Assembly language programming Modules

Test

Evaluation : Examen Ecrit (2h00)

Resit : Examen Ecrit (2h00)

one written exam (3 h). If failed, a second 2h exam.

Calendar

The course exists in the following branches:

  • Curriculum - Information Systems Engineering - Semester 8
see the course schedule for 2025-2026

Additional Information

Course ID : 4MMARCA6
Course language(s): FR

The course is attached to the following structures:

  • Team Architecture-System-Auto

You can find this course among all other courses.

Bibliography

David Patterson et John Hennessy, Computer Architecture, A Quantitative Approach, 4ème édition, Morgan Kaufman (Turing award 2017)
William Stallings, Computer Organization and Architecture, 5ème édition, Prentice-Hall