CONCEPTION ET EXPLORATION D'ARCHITECTURES, MULTI-COEURS, RESEAUX SUR PUCE - 5MMCEAMC
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Goals
The digital system complexity is increasing together with the tremendous integration that integrated circuit fabrication technology offers. Future improvements will come from the parallelisation of several processing units such as CPU or dedicated hardware units (IP). Indeed, the running frequency of digital system is reaching a limit that need to be overcomed thanks to an increase of parallelism. The digital system complexity needs to be manage and some methodology is needed to design efficient systems.
The purposes of this course are:
* To give a framework and methodologies for the design of embedded systems.
* Set performance criterias to guide the designer and help OEM to choose efficient products.
Content * Hardware architecture (integrated system bus, memory architecture, integrated CPUs, IP)
* Software architecture (RTOS, API)
* Parallel embedded architectures, MPSoC architectures, ManyCores
* Network on Chip
* Advanced memory hierarchy, data management
* Case studies : Multimedia, mobile phones, network processors, xDSL, 3D
A lab session illustrate the lectures.
Prerequisites * Digital design, computer architecure
* Software design basis
Tests Give kind of exam for session 1 and session 2: written, allowed documents or not, oral, practical work, reports, plan, vivas
N1=E1+TP
N2=E2+TP
Additional Information Course ID : 5MMCEAMC
Course language(s): 
The course is attached to the following structures:
You can find this course among all other courses.
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Date of update January 15, 2017