Hardware Security & Safety - 5MMSSM

Number of hours
- Lectures 21.0
- Projects -
- Tutorials -
- Internship -
- Laboratory works 36.0
- Written tests -
ECTS
ECTS 4.5

Goal(s)

The objective is to make students aware of dependability and security constraints from a hardware point of view. Theoretical bases are explained in lectures and practical examples are then experienced.

Responsible(s)

Michele PORTOLAN

Content(s)

Reliability and Safety

issues and types of perturbations
approaches to protect against perturbations
evaluation of teh dependability level

Security

issues and evolutions
certification principles
types of hardware attacks ; examples and charactérization
protection methods (couter-measures)

Prerequisites

Digital design, computer architecture, VHDL

Test

Evaluation combining two parts:
- one exam (written, two hours for first session - may be oral in second session)
- continuous control: two reports on practical work (per group of two students, no change of score in second session)

N1 = (1/2 E1 + 1/2 TP)
N2 = (1/2 E2 + 1/2 TP)

S1: 50% DS écrit, 50% Rapport des TP

S2: 50% Rattrapage oral ou écrit pour la partie DS, 50% note de TP non rattrappable

Calendar

The course exists in the following branches: