Industrial Processes for high-confidence design - WMM9MO13

Goal(s)

The objective of this course is to present the cutting-edge industrial practices for the design and analysis of complex software and hardware systems. It presents an overview of state-of-the-art design flows and modeling techniques. It also describes some currently widespread methods for the specification and verification of properties (validation by simulation, conformance testing, runtime verification), thus identifying their distinctive capabilities in comparison with formal methods.

Content(s)

1. Design and Modeling

• Embedded software design: design flow and modeling styles (component-based design and BIP, model-based design and SCADE) – Practical examples

• Embedded hardware design: design flow for systems on chip (SoC) and modeling styles (description and simulation paradigms, high-level modeling with SystemC) – Design space exploration – Functional and non-functional properties (performance, safety, security, low power,...) – Practical examples

• Systems engineering, design of complex multiphysics systems: design issues, high-level modeling (coarse-grained modeling, use of systems modeling languages like SysML), concrete system modeling and simulation (fine-grained modeling, multiphysics simulation, use of languages and environments like Simulink, Modelica)

• Critical systems and the certification process, international standards (e.g., DO-254 and DO-178C for airborne systems, ISO 26262 for automotive systems, IEC certification for electrical appliances,...) – Practical example

2. Analysis, Test, Verification

• Embedded software – Runtime verification versus formal verification: runtime verification basics, handling data in monitoring, runtime verification of sequential software, component-based systems, concurrent, distributed and real-time systems

• Requirements analysis for embedded software: theory and practice of conformance testing, input-output conformance (ioco)

• Validation by simulation and test for embedded hardware/systems: transactional (TLM) versus register transfer level (RTL) paradigms, SystemC versus VHDL simulation, testbench design, coverage analysis

• Embedded systems – Runtime verification versus formal verification: temporal specifications for transactional SoC (systems on chip) models, runtime monitoring of temporal properties for transactional descriptions, transactions observation

• Open issues, shortcoming and limitation of standard approaches

Object-oriented design, programming languages (C, Java, C++), basic knowledge of propositional logic and first-order logic, basic knowledge of hardware architecture.