Number of hours
- Lectures -
- Projects 20.0
- Tutorials 16.0
- Internship -
- Laboratory works 12.0
- Written tests -
ECTS
ECTS 4.0
Goal(s)
- Understanding the Foundations of a Computer System
Discover how digital electronics serve as the hardware basis for logical systems and connect abstract computing to the physical world.
- Designing a Digital Circuit for a Specific Algorithm
Build complex operators from elementary functions, design automata to sequence and synchronize circuit operations, and transform an abstract algorithm into a concrete hardware architecture.
- Understanding How Processors Work
Explore the concept of a processor's instruction set, understand how this concept enables the execution of any algorithm on the same digital circuit, analyze and design the microarchitecture of processors that can interpret an instruction set efficiently, discover the concept of cache, and grasp the RISC-V architecture.
- Practicing Circuit Design
Use a hardware description language to design and simulate digital circuits, test circuits on an FPGA board, and develop your own RISC-V processor as a project.
Olivier MULLER
Content(s)
Volume: 8 tutorials (TD) of 2 hours, 6 lab sessions (TP) of 2 hours, 10 project sessions of 2 hours
- Fundamentals of Digital Circuits: Combinational logic (TD1), sequential logic (TD2 and TP1), algorithmic constructions (TD3, TP2), arithmetic operators (TD4, TP3), state machines (TD5, TP4)
- Design of Application-Specific Circuits: PCPO (TD6, TP5)
- Introduction to Processor Functioning: Study of a basic processor to explore architecture concepts, instruction encoding, and programming (TD7 and TD8), Demonstration of cache usefulness (TP6)
- RISC-V Processor Design Project: Development of a multi-cycle architecture (data path, control unit, peripherals), validation through simulation and FPGA implementation
None
Evaluation : 50% of Projet (évaluation en continu et sur le rendu) + soutenance and 50% of Examen Ecrit (2h)
Resit : 50% of Projet (évaluation en continu et sur le rendu) + soutenance (reported score) and 50% of Examen Ecrit (2h)
CONTINUOUS ASSESSMENT:
A project grade (NPR) based on progress and the correction of the submitted project sources.
REGULAR SESSION: Continuous assessment and exam
- Exam type: Written exam
- Duration: 2 hours
- Allowed documents: One A4 summary sheet (handwritten or not)
- Equipment: No equipment allowed
MAKE-UP SESSION: Exam, which only replaces the exam grade from session 1; continuous assessment grades are retained.
Same conditions as the regular session.
The course exists in the following branches:
- Curriculum - Core curriculum - Semester 5
Course ID : 3MMFMN
Course language(s):
You can find this course among all other courses.
- David Patterson et John Hennessy, Computer Architecture, The hardware/software interface, 4ème édition, Morgan Kaufman
- John F. Wakerly, Digital Design: Principles And Practices
- Le langage VHDL : du langage au circuit, du circuit au langage / Jacques Weber, Sébastien Moutault, Maurice Meaudre
- The RISC-V Instruction Set Manual, Volume I: Unprivileged ISA (https://riscv.org/technical/specifications/)