Filling the gap between high level programming and computer architecture, it provides students with a synthesis of these fields and a global understanding of how computers work. The course is organized around the learning of assembly languages (RISC and CISC).
The student will understand how a processor work, designing a RISC processor.
Knowledge of a classical imperative language (Ada, C...) and of the basis of computer architecture
NPR : Project evaluation (authorized only one manuscript A4 recto/verso)
NTP : Practical final examination
NTP2 : Practical final examination for session 2
The course exists in the following branches:
Course ID : 3MMCEP
The course is attached to the following structures:
You can find this course among all other courses.
Le langage VHDL : du langage au circuit, du circuit au langage / Jacques Weber, Sébastien Moutault, Maurice Meaudre
The RISC-V Instruction Set Manual, Volume I: Unprivileged ISA (https://riscv.org/technical/specifications/)
Date of update January 15, 2017